Sr. Staff Elect Design Engineer

面议

上海市|工作经验：5-10年|学历：硕士|招聘1人|全职
年底多薪津贴福利带薪年假
发布时间：2018-03-28 09:33:37

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职位类别：

电子技术研发工程师

职位描述：

Job Description:

· Will be core member or leader of IP verification or SoC verification project.

· Work with designer to translate design specification into verification requirement, develop high efficient coverage driven randomization stimulus and self-check test bench to achieve high quality and on time delivery.

· Develop UVM based verification IP which can be reused at different levels of verification: block level, sub-system level, SoC level, etc.

· Work on SoC level verification including subsystem VIP integration, full chip tests development and regression for both RTL and gate level simulation.

· VIP maintain, upgrade and integration support.

· As a key role of verification team, contribute to improve the productivity of the team.

Job Requirements:

· MSEE with 5+ years working experience in verification

· Good knowledge on System Verilog and UVM.

· Well-experienced in IP and SoC verification.

· Be capable to take ownership on verification project.

· Good communication skill, and fluent English.

· Has ability to improve work flow and quality.

· Good team player and strong sense of responsibility to deliver on time.

Education & Work Experience:

· MS EE with 5+ years experience

· Graduated from Tier 1 university