电子技术研发工程师
IC验证工程师
Staff Mixed Signal Verification Engineer
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面议
上海市|工作经验：5-10年|学历：本科|招聘1人|全职
- 领导好 发展空间大 公司规模大
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发布时间：2018-08-17 11:11:41
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职位类别：
职位描述：
Job Description:
1.Work on mixed-signal/Finesim simulation/verification of Programmable SoC project
2.Create the Mixed-signal/Finesim verification plan and test bench according to the Spec
3.Verify/debug analog/digital design and fix the issue with the original designer together
4.Develop analog/digital toolkit (behavioral model, .lib view, LEF view etc) of mixed/analog blocks
5.Work on Full chip analog DFT design and test case development, analysis and simulation
6.Other responsibilities include supporting other groups in the test, qualification and release to production
7.Document the verification plan, coverage, implementation, and method.
Job Requirements:
1.Very good English skills
2.Takes initiative and sets high goals
3.Smart and confident
4.Self starter & ability to work in a team environment as an individual contributor
5.Track record of planning and delivering own work completely and on time
Education & Work Experience:
1.5+ years with Master's Degree or 7+ years with Bachelor Degree in EE/CE
2.Experience on custom IC design skills
3.Experience on Mixed-signal/Finesim SoC product with MCU and the peripheral IPs
4.Knowledge with a wide range of analog IP such as Band-Gap, OPAMP, Switch Cap, OSC, ADC, and so on.
5.Understand digital verilog design and analog models.
6.Experience on Memory design is plus
7.LATCHUP and ESD knowledge is plus
8.Experience in analog and digital simulation tools, ELDO, NANOSIM, and MODELSIM tools experience is plus.
9.Proficiency in Perl, Tcl, Shell, assembly and C languages
1.Work on mixed-signal/Finesim simulation/verification of Programmable SoC project
2.Create the Mixed-signal/Finesim verification plan and test bench according to the Spec
3.Verify/debug analog/digital design and fix the issue with the original designer together
4.Develop analog/digital toolkit (behavioral model, .lib view, LEF view etc) of mixed/analog blocks
5.Work on Full chip analog DFT design and test case development, analysis and simulation
6.Other responsibilities include supporting other groups in the test, qualification and release to production
7.Document the verification plan, coverage, implementation, and method.
Job Requirements:
1.Very good English skills
2.Takes initiative and sets high goals
3.Smart and confident
4.Self starter & ability to work in a team environment as an individual contributor
5.Track record of planning and delivering own work completely and on time
Education & Work Experience:
1.5+ years with Master's Degree or 7+ years with Bachelor Degree in EE/CE
2.Experience on custom IC design skills
3.Experience on Mixed-signal/Finesim SoC product with MCU and the peripheral IPs
4.Knowledge with a wide range of analog IP such as Band-Gap, OPAMP, Switch Cap, OSC, ADC, and so on.
5.Understand digital verilog design and analog models.
6.Experience on Memory design is plus
7.LATCHUP and ESD knowledge is plus
8.Experience in analog and digital simulation tools, ELDO, NANOSIM, and MODELSIM tools experience is plus.
9.Proficiency in Perl, Tcl, Shell, assembly and C languages
公司介绍：
Cypress公司是一家知名的电子芯片制造商，其中文名称为——赛普拉斯。 赛普拉斯在纽约股票交易所上市，在数据通信、消费类电子等广泛领域均提供芯片解决方案。
工作地址：
上海市 - 浦东新区 赛普拉斯半导体技术（上海）有限公司
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